Originally posted by Inst
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So rather than invent a new core for the sake of glory, they analyzed current supercomputers to determine where is the bottleneck and worked to find a better way. Seems InfiniBand was gating performance so the Chinese team tackled the interconnect. According to EE Times they invented an interconnect chip set called Galaxy that pumps 160 Gigabits per second.
What does this have to do with system-on-chip interconnects? Plenty.
When system-on-chip designers set out to meet requirements with a new design or derivative, they often forget to reexamine past designs to understand what was gating performance or what other features customers wanted, but could not get. We tend to immediately jump into the trap of "it will have this latest ARM core" and "there's an update to the graphics core we can add" before we look at the system as a whole to understand what is most important. In other words, we often don't understand the degrees of freedom we should exercise when developing a new product because we are blinded by the "sexy" stuff we could do.
The interconnect isn't sexy (Well, I think it is, but most people don't). But if it is gating performance, or using too much power, or increasing the size of your die, then it is a bottleneck. Removing that interconnect bottleneck is just as important, or maybe even more important, than adding that fancy new IP core that everyone is all excited about.
What does this have to do with system-on-chip interconnects? Plenty.
When system-on-chip designers set out to meet requirements with a new design or derivative, they often forget to reexamine past designs to understand what was gating performance or what other features customers wanted, but could not get. We tend to immediately jump into the trap of "it will have this latest ARM core" and "there's an update to the graphics core we can add" before we look at the system as a whole to understand what is most important. In other words, we often don't understand the degrees of freedom we should exercise when developing a new product because we are blinded by the "sexy" stuff we could do.
The interconnect isn't sexy (Well, I think it is, but most people don't). But if it is gating performance, or using too much power, or increasing the size of your die, then it is a bottleneck. Removing that interconnect bottleneck is just as important, or maybe even more important, than adding that fancy new IP core that everyone is all excited about.
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